Branching And Logic

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High-level languages typically provide constructs for creating structured programs. Assembly languages, however, provide no such statements. Instead, selection and repetition type statements are constructed using jumps and branches. Consider the following sample code segment which stores a value in register t0 based on the value in register t1.

       lw   $t0, 1
       beq  $t1, $zero, end
         lw   $t0, 2
         j    end
  two: lw  $t0, 3
  end: li  $v0, 1
       move $a0, $t0
       syscall

Branching

MIPS provides several jump or branching statements, of which some of the more common ones are listed below

beq rs, rt, label

jumps to the instruction at label if rs == rt.

bne rs, rt, label

jumps to the instruction at label if rs != rt.

bgtz rs, label

jumps to the instruction at label if rs > 0.

bgez rs, label

jumps to the instruction at label if rs >= 0.

bltz rs, label

jumps to the instruction at label if rs < 0.

blez rs, label

jumps to the instruction at label if rs <= 0.

j label

unconditionally jump to the instruction at label.

Logical Conditions

The MIPS assembly instructions perform simple comparisons between two registers or compare a register against the value of zero to determine when to jump to a given location. While most programs require more detailed comparisons such as x >= y, all logical expressions can be reduced to a value of zero or one and then used with the branching statements. The MIPS set statements are used for this purpose as illustrated below

       lw   $t0, 1
       slt  $t1, $t2, $t3
       bne  $t1, $zero, end
         lw   $t0, 2
         j    end
  two: lw  $t0, 3
  end: li  $v0, 1
       move $a0, $t0
       syscall

The MIPS conditional operations are described below

slt rd, rs, rt

sets register rd to 1 if rs < rt; otherwise, rd is set to 0.

sltu rd, rs, rt

the same as slt but for unsigned integers.

slti rd, rs, imm

the same as slt but for compares rs against the give literal value.

sltiu rd, rs, imm

the same as slti but for unsigned integers.

Pesudo Instructions

Several pesudo instructions for logical conditions are also available

seq rdest, rsrc1, rsrc2

sets register rdest to 1 if register rsrc1 == register rsrc2, and 0 otherwise.

seq rdest, rsrc1, rsrc2

sets register rdest to 1 if register rsrc1 == register rsrc2, and 0 otherwise.

sequ rdest, rsrc1, rsrc2

same as seq but for unsigned values.

sne rdest, rsrc1, rsrc2

same as seq but determines if rsrc1 != rsrc2

sgt rdest, rsrc1, rsrc2

same as seq but determines if rsrc1 != rsrc2

sgtu rdest, rsrc1, rsrc2

sge rdest, rsrc1, rsrc2

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